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AED760UD00-500 1 GByte DDR400 CL3 184-Pin UDIMM
Description This data sheet describes features and specification of AENEON™ memory module family AED760UD00-500.
Specification
Clock cycle time tCK for CL3
5 ns (min.) / 8 ns (max.)
Clock cycle time tCK for CL2.5
6 ns (min.) / 12 ns (max.)
Row cycle time tRC
55 ns (min.)
Refresh row cycle time tRFC
65 ns (min.)
Activate to read/write delay tRCD
15 ns (min.)
Row active time tRAS
42 ns (min.) / 70.000 ns (max.)
Single power supply VDD = VDDQ
2.6 V ± 0.1 V for tCK < 6ns, else 2.5 V ± 0.2 V
Operating power IDD0
3.7 W (max.)
Module dimensions L x W x H
133.35 mm x 30.0 mm x 4.0 mm (max.)
5.25" x 1.18" x 0.16" (max.)